SMIC Explained: What China's Largest Chipmaker Can Actually Produce

SMIC posted $9.3 billion in revenue for 2025, an all-time record. Its 7nm process yield reportedly reached 92%. China plans to increase advanced chip output fivefold by 2028. These numbers sound impressive — until you compare them to TSMC, which generated roughly ten times the revenue and whose 3nm process alone accounted for 24% of its wafer income in Q4 2025.

This gap between "record-breaking" and "still far behind" is the essential story of Semiconductor Manufacturing International Corporation, China's largest chip foundry and the company at the center of the US-China semiconductor conflict. SMIC is simultaneously proof that China can build advanced chips and evidence of how far it still has to go.

Here is what SMIC can actually manufacture, how it achieves 7nm without the lithography tools the rest of the industry uses, and why the answer matters for the global chip supply chain.

> Key takeaway: SMIC has achieved 7nm production using DUV lithography — a feat most analysts considered impossible five years ago. But the process is expensive, yields are lower than competitors, and the company remains at least a full generation behind TSMC and Samsung with no clear path to 5nm or 3nm at scale.

What Is SMIC? Company Background and Scale

Semiconductor Manufacturing International Corporation was founded in April 2000 in Shanghai by Richard Chang (Zhang Rujing), a former Texas Instruments executive. The company was built as China's answer to TSMC — a pure-play foundry that manufactures chips designed by other companies rather than selling its own products.

From its start, SMIC pursued aggressive expansion. Within its first five years, the company established fabrication plants in Shanghai, Beijing, Tianjin, and Shenzhen. It went public on the Hong Kong Stock Exchange (SEHK: 0981) and later on the Shanghai STAR Market. Today, SMIC operates fabs across four Chinese cities and has become the third-largest contract chipmaker in the world by revenue, according to Counterpoint Research data from 2024.

The Numbers

The revenue comparison is staggering. SMIC's record year would barely register as a quarterly fluctuation for TSMC. The profitability gap is even wider — TSMC's 40.5% net margin versus SMIC's 6.1% reflects the fundamental economics of cutting-edge semiconductor manufacturing. Advanced nodes command premium pricing; mature nodes compete on volume and cost.

SMIC's customer base is overwhelmingly domestic. Chinese fabless chip designers — particularly Huawei's HiSilicon division — represent a growing share of its advanced-node orders. This is not by choice alone. US export controls have cut Chinese companies off from TSMC, creating a captive market that redirects demand to SMIC regardless of its technical competitiveness.

Manufacturing Footprint

SMIC operates fabrication plants across mainland China, each serving different technology segments. Its Shanghai fabs handle the most advanced process development, including the 7nm N+2 line. Beijing facilities focus on both advanced and mature node production. The Tianjin and Shenzhen fabs primarily serve mature-node demand at 28nm and above, supporting the automotive and IoT chip markets that form SMIC's commercial backbone.

The company has continued to expand its footprint. SMIC announced two major capital investments in 2025 to add capacity across multiple sites, according to TrendForce. This expansion is driven by both market demand and strategic urgency — building capacity now, before potential equipment restrictions tighten further, is a calculated gamble.

SMIC's Process Technology: From 28nm to 7nm

SMIC uses its own naming convention for process nodes. The industry-standard nanometer labels (7nm, 5nm, 3nm) are marketing terms, not physical measurements, but they provide a useful shorthand for comparing capabilities across foundries.

N+1: The Starting Point (Roughly 10nm-Class)

SMIC's N+1 process, introduced around 2020, was its first step beyond 14nm. It delivered approximately 20% better performance and 57% lower power consumption compared to its 14nm node, with a 55% reduction in logic area. In practical terms, N+1 brought SMIC to roughly the 10nm class — comparable to where Intel was with its troubled 10nm process.

N+1 was not commercially significant for advanced applications. It served primarily as a stepping stone and was used for limited production runs. But its importance was strategic: N+1 established the multi-patterning techniques and process engineering expertise that would later make the 7nm breakthrough possible. SMIC engineers learned to work with the limitations of DUV lithography at scale, developing institutional knowledge that no other foundry needed to accumulate because they all had access to EUV.

N+2 / 7nm: The Breakthrough

SMIC's N+2 process is its most significant technological achievement. First identified in 2023 through teardown analysis of Huawei's Kirin 9000s chip by TechInsights, the process achieves transistor densities in the 7nm class.

The critical detail: SMIC achieves 7nm using only DUV (Deep Ultraviolet) lithography. Every other foundry that has reached 7nm — TSMC, Samsung — uses EUV (Extreme Ultraviolet) lithography from ASML, which operates at a 13.5nm wavelength versus DUV's 193nm. EUV provides dramatically finer patterning resolution.

SMIC cannot access EUV tools because of US export controls. Instead, it uses a technique called multi-patterning — specifically Self-Aligned Quadruple Patterning (SAQP) — with ASML's older DUV immersion scanners. This means exposing each chip layer multiple times with slightly offset patterns to achieve feature sizes below the theoretical resolution limit of the light source.

The cost is enormous. Multi-patterning roughly quadruples the number of lithography steps, increases mask complexity, and raises defect probability at every additional step. Each additional patterning pass is another opportunity for misalignment, contamination, or equipment error. Industry estimates suggest SMIC's per-wafer cost at 7nm is significantly higher than TSMC's EUV-based equivalent.

What About 5nm?

Reports indicate SMIC is developing a 5nm-class process, also using DUV. Huawei's AI accelerator chips (Ascend series) and some smartphone processors are reportedly targeted for this node. However, the engineering challenges of pushing DUV beyond 7nm are formidable. At 5nm feature sizes, the number of patterning steps increases further, costs escalate, and yields tend to drop.

According to a report from East Money, SMIC's 2026 projected revenue from Huawei phone chips at 7nm is approximately $1.73 billion, with Huawei AI chips at 5nm contributing roughly $309 million. The 5nm figure suggests limited, not mass, production — likely for specialized AI accelerators where performance justifies the cost premium.

SMIC itself has not publicly confirmed a 5nm process. The company is notoriously tight-lipped about its advanced nodes, partly to avoid drawing additional US scrutiny.

SMIC vs TSMC vs Samsung: The Technology Gap

The most honest assessment of the technology gap comes from ASML itself. The Dutch lithography giant's leadership has estimated that SMIC's chip technology lags behind TSMC and Intel by approximately 10 to 15 years. This is a blunt assessment from the company that makes the machines everyone depends on.

Process Node Comparison (2026)

Yield Comparison

Yield — the percentage of functional chips per wafer — is the critical metric that separates a lab demonstration from a commercial product. SMIC's 7nm yield has reportedly reached approximately 92%, according to industry sources cited on LinkedIn. This is a meaningful achievement, but context matters.

TSMC's 7nm process, which has been in mass production since 2018, operates at yields well above 95%. More importantly, TSMC achieves these yields with fewer process steps (thanks to EUV), lower per-wafer cost, and higher throughput. SMIC's 92% yield at 7nm with DUV multi-patterning is technically impressive but commercially challenging — the cost per good die remains higher than TSMC's mature 7nm process.

The yield issue is reflected in SMIC's financials. Despite record revenue in 2025, the company's gross margin fell to 19.2% in Q4, according to DigiTimes, partly because of the cost structure of advanced-node production with DUV.

The Profitability Problem

The gap between SMIC and TSMC is ultimately not a technology gap — it is a profitability gap. TSMC's 40.5% net margin means it generates enormous cash from its advanced-node business, which it reinvests into R&D and next-generation equipment. SMIC's 6.1% margin barely covers its capital expenditure needs, forcing it to rely on government subsidies, state-backed investment, and debt financing.

This dynamic creates a feedback loop that is difficult to escape. Lower margins mean less R&D investment, which means slower technology advancement, which means more dependence on costly workarounds, which means lower margins. SMIC is not in this cycle alone — Chinese government support and captive domestic demand provide crucial countervailing forces. But the structural disadvantage is real and compounding.

How SMIC Achieves 7nm Without EUV

Understanding SMIC's technical approach requires understanding what EUV actually does and why its absence matters.

The Lithography Problem

Chip manufacturing works by projecting circuit patterns onto silicon wafers using light. The wavelength of the light determines how small the features can be. DUV lithography uses 193nm wavelength light (from argon fluoride lasers). EUV uses 13.5nm wavelength — roughly 14 times shorter.

Shorter wavelength means finer features means smaller transistors means more chips per wafer means lower cost per chip. This is the fundamental driver of Moore's Law economics.

SMIC is blocked from buying EUV tools. ASML, the only company that manufactures EUV lithography machines, is prohibited from selling them to Chinese customers under US and Dutch export controls. Each EUV machine costs approximately $200 to $300 million, and ASML produces only a few dozen per year.

The Multi-Patterning Solution

SMIC's workaround is multi-patterning with DUV. Instead of one exposure per layer, it uses multiple exposures with different masks, slightly offset, to create patterns finer than the light's resolution limit would normally allow.

Self-Aligned Quadruple Patterning (SAQP) works roughly like this:

1. A first pattern is exposed and etched onto the wafer
2. A spacer material is deposited around the patterned features
3. The original pattern is removed, leaving only the spacers
4. The spacers serve as the mask for the next etch step
5. The process repeats, effectively quadrupling the pattern density

This technique is well-understood in the industry — Intel and TSMC both used multi-patterning at 10nm and early 7nm before transitioning to EUV. The difference is that they treated multi-patterning as a bridge technology while waiting for EUV. SMIC has no bridge. Multi-patterning is its destination.

The Cost of the Workaround

The practical consequences are significant:

• More process steps: SAQP roughly doubles or quadruples the number of steps per layer compared to single-exposure EUV
• Higher defect rates: Each additional step introduces potential misalignment and contamination
• Lower throughput: More steps mean longer cycle times per wafer
• Higher mask costs: Multi-patterning requires more photomasks, each costing tens of thousands of dollars
• Equipment wear: Running more exposures through the same DUV scanners accelerates equipment degradation

Industry analysis from Asia Times notes that China's domestic DUV alternative, the SMEE SSA800, costs roughly one-seventh the price of an ASML DUV scanner but achieves only 28nm capability with a positioning accuracy of 1.5nm versus ASML's 0.5nm. SMIC relies on imported ASML DUV machines for its advanced work — machines that are themselves subject to increasing restrictions under legislation like the US MATCH Act.

SMIC and Huawei: The Critical Partnership

The relationship between SMIC and Huawei is arguably the most consequential chip partnership in China today. After US sanctions cut Huawei off from TSMC in 2020, the telecom giant was forced to find a domestic foundry for its HiSilicon-designed chips. SMIC was the only option.

The Kirin 9000s Moment

In August 2023, Huawei launched the Mate 60 Pro smartphone powered by the Kirin 9000s processor. Teardown analysis by TechInsights confirmed the chip was manufactured by SMIC on its 7nm (N+2) process. The event was a geopolitical earthquake — it demonstrated that despite years of export controls, China could produce an advanced smartphone chip domestically.

The Kirin 9000s is not competitive with Qualcomm's latest Snapdragon or Apple's A-series chips on performance or efficiency. It runs slower, uses more power, and costs more to manufacture. But it proved that 7nm was achievable without EUV, something many Western analysts had doubted.

Beyond Smartphones: AI Chips

The SMIC-Huawei partnership extends well beyond phones. Huawei's Ascend AI accelerator chips — critical for China's domestic AI infrastructure — are manufactured by SMIC. The Ascend 910D and related chips are targeted at replacing NVIDIA GPUs in Chinese data centers, a national priority given US restrictions on advanced AI chip exports.

According to revenue projections, SMIC's Huawei AI chip manufacturing could reach approximately $309 million in 2026 at the 5nm node. This is still modest compared to NVIDIA's AI chip revenues, but it represents the beginning of a domestic supply chain for AI training and inference hardware.

The partnership creates a strategic dependency that cuts both ways. Huawei needs SMIC for manufacturing. SMIC needs Huawei's advanced chip designs to push its process technology forward. Without demanding customers like Huawei, SMIC would have little reason to invest in the expensive, yield-challenging advanced nodes.

The TSMC Vacuum

Before 2020, Huawei was one of TSMC's largest customers. HiSilicon's Kirin chips were manufactured at TSMC's most advanced nodes, alongside Apple's A-series and Qualcomm's Snapdragon processors. The loss of TSMC as a manufacturing partner was devastating for Huawei — it meant the company could no longer produce cutting-edge smartphone processors and had to restructure its entire chip strategy around domestic capabilities.

For SMIC, the situation was different. Gaining Huawei as a customer was transformative but also overwhelming. Huawei's chip designs pushed SMIC to its technical limits, forcing rapid process development that the foundry might not have attempted otherwise. The huawei-chip-strategy article explores this dynamic in depth — how Huawei essentially willed SMIC's 7nm capability into existence by providing demanding designs, substantial volume commitments, and engineering collaboration.

Sanctions Survival: How SMIC Grows Despite Export Controls

SMIC was added to the US Entity List in December 2020, restricting its access to American technology and equipment. The restrictions have tightened repeatedly since then. Yet SMIC's revenue has grown every year.

The Captive Market Effect

The most important factor in SMIC's growth is paradoxically created by the sanctions themselves. When US export controls blocked Chinese companies from buying chips from TSMC, those companies had to go somewhere. SMIC became the default domestic option.

This creates a dynamic where sanctions designed to slow SMIC's growth actually guarantee its revenue. Chinese AI companies, smartphone makers, and automotive chip designers who previously used TSMC now route orders through SMIC. The smic-record-revenue-despite-sanctions is not despite sanctions — it is because of them.

Capital Investment Despite Margin Pressure

SMIC spent $8.1 billion on capital expenditure in 2025, up 10.5% from 2024. The company's 2026 capex is projected to remain high, exceeding 20% of its audited net assets according to its HKEX annual report filing. This is enormous for a company with a 6% net margin — it means SMIC is reinvesting virtually all profit and borrowing heavily to fund expansion.

The math is brutal. SMIC must invest a far higher share of revenue into capital equipment than TSMC because:

1. DUV multi-patterning requires more equipment: More process steps means more tools per wafer
2. Domestic equipment alternatives are immature: China's semiconductor equipment self-sufficiency stands at approximately 35%, per industry data
3. Sanctions create urgency: SMIC must stockpile equipment and build capacity before further restrictions take effect
4. Mature-node capacity is also expanding: SMIC is not just building advanced fabs — it is also expanding 28nm and older capacity for automotive and IoT chips

The MATCH Act Threat

The bipartisan MATCH Act, advancing through the US House Foreign Affairs Committee as of April 2026, represents the next escalation. As detailed in us-match-act-china-duv-lithography-analysis, the legislation would impose countrywide restrictions on ASML DUV immersion lithography — the machines SMIC depends on for its 7nm process.

This is different from previous controls that targeted specific entities or fabs. A countrywide DUV restriction would prevent ASML from selling or servicing any DUV immersion tools in China. If enacted, it would gradually degrade SMIC's advanced manufacturing capability as existing machines wear out and cannot be replaced or repaired.

SMIC's response has been to accelerate production expansion while it can. China reportedly aims to increase 7nm-and-below capacity to 100,000 wafer starts per month within two years, according to Nikkei via TrendForce — a roughly fivefold increase from current levels of approximately 20,000 wafers per month.

The Mature Node Strategy: Where SMIC Actually Makes Money

While the focus on SMIC's 7nm process is understandable, the company's commercial foundation rests on mature nodes — 28nm and above. This is where most of SMIC's revenue and nearly all of its profit comes from.

Why 28nm Matters More Than 7nm

The global semiconductor market is not defined by smartphone processors and AI accelerators alone. The vast majority of chips produced worldwide — for automobiles, industrial equipment, home appliances, power management, IoT devices — use mature nodes. The 28nm node in particular represents a sweet spot of performance, cost, and reliability.

SMIC has invested heavily in 28nm capacity, and this is where the sanctions actually help rather than hurt. Chinese companies that previously split orders between SMIC and TSMC for mature-node chips are now consolidating with SMIC for supply chain security. The china-semiconductor-industry-guide covers this domestic substitution trend in more detail.

Automotive Chip Opportunity

China's automotive industry — the world's largest — consumes enormous volumes of mature-node chips. A single modern vehicle contains 1,000 to 3,000 semiconductor chips, and the vast majority use nodes of 28nm or older. As Chinese automakers like BYD, NIO, and XPeng expand production and add more electronic features, demand for these chips continues to grow.

SMIC is well-positioned to serve this market. It has the scale, the domestic customer relationships, and the policy support. The company's mature-node business is profitable, growing, and relatively insulated from the technology gap that plagues its advanced-node operations.

The 28nm Capacity Race

SMIC is not alone in chasing the 28nm opportunity. Nexchip (China's third-largest foundry) filed for a Hong Kong listing in 2025 to fund capacity expansion. Hua Hong, China's second-largest foundry, is also scaling mature-node production. The domestic competition is intensifying even as all three companies benefit from the same sanctions-driven demand redirection.

China's integrated circuit manufacturing output rose 49.4% year-over-year in Q1 2026, according to National Bureau of Statistics data via TechNode. Electronic special materials manufacturing grew 32.5%. These numbers reflect not just SMIC's expansion but a broad-based scaling of China's chip manufacturing ecosystem. The industrial infrastructure — trained engineers, supply chain networks, equipment maintenance capabilities — is maturing alongside the foundries themselves.

The risk is overcapacity. If every Chinese foundry builds 28nm capacity simultaneously, the domestic market could become oversupplied, compressing margins and making it harder to fund the advanced-node investments that matter most strategically. SMIC's challenge is balancing the profitable mature-node business against the strategically critical but money-losing advanced-node push.

SMIC's Future: Three Scenarios

Scenario 1: Stagnation (Probability: Medium)

If the MATCH Act or similar legislation fully restricts DUV equipment sales and servicing, SMIC's advanced-node capability gradually degrades. Existing machines wear out. Yields decline. The 7nm process becomes unsustainable without equipment maintenance. SMIC retreats to 28nm and above, becoming a mature-node foundry with limited strategic significance.

This scenario would not destroy SMIC — the mature-node business is viable — but it would end China's most immediate path to advanced chip manufacturing.

Scenario 2: Incremental Progress (Probability: High)

SMIC continues to squeeze performance out of DUV lithography through process optimization. The 5nm-class process reaches limited production for specialized AI and smartphone chips. Yields improve slowly. Revenue grows as domestic demand continues to redirect toward SMIC. But the technology gap with TSMC remains at 2-3 generations and does not close.

This is the most likely scenario based on current data. SMIC has demonstrated the ability to push DUV further than expected, but each incremental improvement costs more and delivers less.

Scenario 3: Breakthrough (Probability: Low)

China develops a domestic EUV alternative or a fundamentally different manufacturing approach that bypasses current limitations. Reports of a Chinese EUV prototype have circulated, as covered in the china-euv-lithography-prototype-analysis topic, but developing a production-grade EUV tool is an enormously complex engineering challenge that took ASML over a decade with global supply chain support.

Even under an optimistic timeline, production-capable domestic EUV is years away. In the meantime, SMIC must work with what it has.

FAQ

Can SMIC make 5nm chips?

SMIC has not publicly confirmed a 5nm process. Industry reports suggest limited 5nm-class production is underway for Huawei AI chips, but this appears to be low-volume, high-cost manufacturing rather than mass production. Achieving 5nm with DUV multi-patterning is technically possible but commercially challenging due to exponentially increasing process complexity and cost.

Is SMIC's 7nm process real?

Yes. Multiple independent teardown analyses, most notably by TechInsights, have confirmed that chips manufactured on SMIC's 7nm-class process (such as Huawei's Kirin 9000s) are genuine. The transistor density, metal pitch, and other measurable characteristics are consistent with the 7nm node class. What remains debated is the commercial viability — cost per good die, yield rates at scale, and production volume.

How does SMIC compare to Intel?

Intel has historically struggled with its own manufacturing transitions but has invested heavily to catch up. Intel's 4nm (Intel 4) and 3nm (Intel 3) processes are in production, and the company has plans for 20A and 18A nodes. SMIC is behind Intel by approximately 2-3 process generations. Intel also has access to EUV, which SMIC does not.

Why can't China just build its own EUV machines?

EUV lithography is among the most complex machines ever built. ASML's EUV system contains over 100,000 components sourced from hundreds of specialized suppliers across multiple countries. The optical system alone — produced by German company Zeiss — requires precision at the atomic level. China is investing in domestic lithography R&D, but building a production-grade EUV tool requires mastering dozens of separate technology domains simultaneously.

Will US sanctions eventually work?

This depends on the definition of "work." Sanctions have slowed SMIC's access to cutting-edge equipment and widened the technology gap. They have not prevented SMIC from achieving 7nm or growing revenue. The MATCH Act's own 75% self-sufficiency threshold implicitly acknowledges that once China develops domestic alternatives at scale, restrictions become irrelevant. The question is whether delays buy enough time for the intended strategic outcomes.

What does SMIC mean for global chip supply?

SMIC's significance extends beyond its own market share. As China's largest foundry, it represents a parallel semiconductor ecosystem that is increasingly self-contained. For the global chip supply chain, SMIC's growth means reduced dependence on TSMC's Taiwan fabs for certain chip types — but only at mature nodes. Advanced AI and smartphone chips will continue to flow primarily through TSMC and Samsung for the foreseeable future.

Related Entries

• china-semiconductor-industry-guide — Full overview of China's semiconductor ecosystem
• huawei-chip-strategy — How Huawei rebuilt its chip supply chain with SMIC
• smic-record-revenue-despite-sanctions — The paradox of SMIC's record growth under sanctions
• us-match-act-china-duv-lithography-analysis — US legislation targeting DUV lithography exports